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  agilent HMMC-3128 dc-12 ghz packaged high efficiency divide-by-8 prescaler HMMC-3128-tr1 - 7? diameter reel/500 each HMMC-3128-blk - bubble strip/10 each data sheet description the HMMC-3128 is a packaged gaas hbt mmic prescaler which offers dc to 12 ghz frequency t ranslation for use in communications and ew systems incorporating high? frequency pll oscillator circuits and signal?path down conversion applications. the prescaler provides a large input power sensitivity window and low phase noise. absolute maximum ratings 1 (@ t a = +25 c, unless otherwise stated) features ? wide frequency range: 0.2?12 ghz  high input power sensitivity: on?chip pre? and post?amps -15 to +10 dbm (1?8 ghz) -10 to +8 dbm (8?10 ghz) -5 to +2 dbm (10?12 ghz) p out : 0 dbm (0.5 v p-p )  low phase noise: -153 dbc/hz @ 100 khz offset  (+) or (-) single supply bias operation  wide bias supply range: 4.5 to 6.5 volt operating range  differential i/0 with on?chip 50 w matching package type: soic-8 plastic package dimensions: 4.9 x 3.9 mm typ package thickness: 1.55 mm typ lead pitch: 1.25 mm nom lead width: 0.42 mm nom symbol parameters/conditions min max units v cc bias supply voltage +7 volts v ee bias supply voltage -7 volts |v cc - v ee | bias supply delta +7 volts v logic logic threshold voltage v cc - 1.5 v cc -1.2 volts p in(cw) cw rf input power +10 dbm v rfin dc input voltage (@ rfin or rf in ports) v cc 0.5 volts t bs 2 backside operating temperature -40 +85 c t st storage temperature -65 +165 c t max maximum assembly temperature (60 seconds max) 310 c notes: 1. operation in excess of any parameter limit (except t bs ) may cause permanent damage to the device. 2. mttf >1 x 10 6 hours @ t bs <85c. operation in excess of maximum operating temperature (t bs ) will degrade mttf.
2 dc specifications/physical properties (t a = +25 c, v cc - v ee = 5.0 volts, unless otherwise listed) notes: 1. prescaler will operate over full specified supply voltage range. v cc or v ee not to exceed limits specified in absolute maximum ratings section. symbol parameters/conditions min typ max units v cc - v ee operating bias supply difference 1 4.5 5.0 6.5 volts |i cc | or |i ee | bias supply current 37 44 51 ma v rfin(q) v rfout(q) quiescent dc voltage appearing at all rf ports v cc volts v logic nominal ecl logic level (v logic contact self-bias voltage, generated on-chip) v cc -1.45 v cc -1.32 v cc -1.25 volts
3 rf specifications (t a = +25 c, z 0 = 50 w , v cc - v ee = 5.0 volts) notes: 1. for sine?wave input signal. prescaler will operate down to dc for square?wave input signal. min. divide frequency limited by input slew rate. 2. prescaler can exhibit this output signal under bias in the absence of an rf input signal. this condition can be eliminated by use of the input dc offset technique described on page 4. 3. fundamental of output square wave?s fourier series. 4. square wave amplitude calculated from p out . symbol parameters/conditions min typ max units ? in(max) maximum input frequency of operation 12 14 ghz ? in(min) minimum input frequency of operation 1 (p in = -10 dbm) 0.2 0.5 ghz ? sel-osc. output self-oscillation frequency 2 3.4 ghz p in @ dc, (square-wave input) -15 >-25 +10 dbm @ ? in = 500 mhz, (sine-wave input) -15 >-20 +10 dbm ? in = 1 to 8 ghz -15 >-20 +10 dbm ? in = 8 to 10 ghz -10 >-15 +5 dbm ? in = 10 to 12 ghz -5 >-10 -1 dbm rl small-signal input/output return loss (@ ? in <10 ghz) 15 db s 12 small-signal reverse isolation (@ ? in <10 ghz) 30 db  n ssb phase noise (@ p in = 0 dbm, 100 khz offset from a ? ou t = 1.2 ghz carrier) -153 dbc/hz jitter input signal time variation @ zero-crossing (? in = 10 ghz, p in = -10 dbm) 1ps t r or t f output transition time (10% to 90% rise/fall time) 70 ps p out 3 @ ? out < 1 ghz -2.0 0.0 dbm @ ? out = 2.5 ghz -3.5 -1.5 dbm @ ? out = 3.0 ghz -4.5 -2.5 dbm |v out(p-p) | 4 @ ? out < 1 ghz 0.5 volts @ ? out = 2.5 ghz 0.42 volts @ ? out = 3.0 ghz 0.37 volts p spitback ? out power level appearing at rf in or rf out (@ ? in 10 ghz, unused rf out or rf out unterminated) -50 dbm ? out power level appearing at rf in or rf out (@ ? in 10 ghz, both rf out or rf out unterminated) -55 dbm p feedthru power level of ? in appearing at rf out or rf out (@ ? in = 12 ghz, pin = 0 dbm, referred to p in (? in )) -30 dbc h 2 second harmonic distortion output level (@ ? out = 3.0 ghz, referred to p out (? out )) -25 dbc
4 applications the HMMC-3128 is designed for use in high frequency communications, microwave instrumentation, and ew radar systems wh ere low phase?noise pll control circuitry or broad? band frequency translation is required. operation the device is designed to operate when driven with either a single?ended or differential sinusoidal input signal over a 200 mhz to 12 ghz bandwidth. below 200 mhz the prescaler input is ?slew?rate? limited, requiring fast rising and falling edge speeds to properly divide. the dev ice will operate at frequencies down to dc when driven w ith a square?wave. due to the presence of an off? chip rf?bypass capacitor inside the package (connected to the v cc contact on the device), and the unique design of the device itself, the component may be biased from either a single positive or single negative supply bias. the backside of the package is not dc connected to any dc bias point on the device. for positive supply operation, v cc pins are nominally biased at any voltage in the +4.5 to +6.5 volt range with pin 8 (v ee ) grounded. for negative bias operation v cc pins are typically grounded and a negative voltage between - 4.5 to - 6.5 volts is applied to pin 8 (v ee ). ac?coupling and dc?blocking all rf ports are dc connected on?chip to the v cc contact through on?chip 50 w resistors. under any bias conditions where v cc is not dc grounded the rf ports should be ac coupled via series cap acitors mounted on the pc? board at each rf port. only under bias conditions where v cc is dc grounded (as is typical for negative bias supply operation) may the rf ports be direct coupled to adjacent circuitry or in some cases, such as level shifting to subsequent stages. in the latter case the package heat sink may be ?floated? and bias applied as the difference between v cc and v ee . input dc offset if an rf signal with sufficient signal to noise ratio is present at the rf input lead, the prescaler will operate and provide a divided output equal the input frequency divided by the divide modulus. under certain ?ideal? conditions where the input is well matched at the right input frequency, the component may ?self?oscillate?, especially under small signal input powers or with only noise present at the input. this ?self?oscillation? will produce an undesired output signal also known as a false trigger. to prevent false triggers or self? oscillation conditions, apply a 20 to 100 mv dc offset voltage between the rfin and rfin ports. this prevents noise or spurious low level signals from triggering the divider. adding a 10k w resistor between the unused rf input to a contact point at the vee potential will result in an offset of ? 25mv between the rf inputs. note, however, that the input sensitivity w ill be reduced slightly due to the presence of this offset. figure 1. simplified schematic v cc v cc v cc v ee out in in out soic8 w/backside gnd 6 42 150p 5 7 by poss in in 50 50 v cc v cc v cc 50 50 out out 3 pin 1 8 v ee vpwr sel
5 figure 2. package & dimensions figure 3. assembly diagram (single-supply, positive-bias configuration shown) rfin v cc (+4 .5 to +6.5 vo lts ) ~ 1 mf mo noblock capacito r rfi n rfou t v cc v cc v cc rfout v ee to operate component from a negative supply, ground each v cc connection and supply v ee with a negative voltage (-4.5 to -6.5v) bypassed to ground with ~ 1 mf capacitor. r f out should be terminated in 50 ? to ground. (dc blocking capacitor required for positive bias configuration.) 9618 hmm c-3128 exposed heat sink on package bottom must be soldered to pcb rf ground. agilent application note #54, ?gaas mmic esd, die attach and bonding guidelines? provides basic inform ation on these subjects. moisture sensitivity classification: class 1, per jesd22-a112-a. additional references: pn #18, ?hbt prescaler evaluation board.? notes: - all dimensions in millimeters. - refer to jedec outline ms-012 for additional tolerances. - exposed heat slug area on pkg bottom = 2.67 x 1.65 - exposed heat sink on package bottom must be soldered to pcb rf ground plane. assembly notes independent of the bias applied to the package, the backside of the package should always be connected to both a good rf ground plane and a good thermal heat sinking region on the pc?board to optimize performance. for single?ended output operation the unused rf output lead should be terminated into 50 w to a contact point at the v cc potential or to rf ground thr ough a dc blocking capacitor. a minimum rf and thermal pc board contact area equal to or greater than 2.67 x 1.65 mm (0.105" x 0.065") with eight 0.020" diameter plated?wall thermal vias is recommended. mmic esd precautions, handling considerations, die attach and bonding methods are critical factors in successful gaas mmic p erformance and reliability. symbol min max a 1.35 1.75 a1 0.0 .25 b 0.33 0.51 c 0.19 .025 d4.805.00 e 3.80 4.00 e1.27 bsc h 5.80 6.20 l 0.40 1.27 a08
6 supplemental data figure 4. typical input sensitivity window figure 6. typical phase noise performance figure 8. typical ?spitback? power (p? out ) appearing at rf input port figure 5. typical supply current & v logic vs. supply voltage figure 7. typical output power vs. output frequency ? out (ghz)
7 1.75 12.0 0.3 1.5+0.1/-0.0 a 5.5 0.05 see note 6 r0.5 typical a 8.0 ao bo ko section a-a 1.5 min r0.3 max. 0.30 0.05 see note 1 see note 6 2.0 0.05 4.0 ao = 6.4mm bo = 5.2 mm ko = 2.1 mm device orientation tape dimensions and product orientation notes: 1. 10 sprocket hole pitch cumulative tolerance: 0.2mm. 2. camber not to exceed 1mm in 100mm. 3. material: black conductive advantek polystyrene. 4. ao and bo measured on a plane 0.3mm above the bottom of the pocket. 5. ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier. 6. pocket position relative to sprocket hole measured as true position of pocket, not pocket hole. reel tape user feed direction cover tape
www.agilent.com/ semiconductors for product information and a complete list of distributors, please go to our web site. for technical assistance call: americas/canada: +1 (800) 235-0312 or (916) 788-6763 europe: +49 (0) 6441 92460 china: 10800 650 0017 hong kong: (+65) 6756 2394 india, australia, new zealand: (+65) 6755 1939 japan: (+81 3) 3335-8152(domestic/international), or 0120-61-1280(domestic only) korea: (+65) 6755 1989 singapore, malaysia, vietnam, thailand, philippines, indonesia: (+65) 6755 2044 taiwan: (+65) 6755 1843 data subject to change. copyright ? 2003 agilent technologies, inc. obsoletes: 5988-6159en october 7, 2003 5989-0202en


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